1. Field of the Invention
The present invention relates to integrated circuits, and more particularly to circuit structures, which provide smooth transitions in multi-layer substrates.
2. Description of the Related Art
Multi-layer structures often include a plurality of electrical connections. The metal lines or conductive landings between structures may or may not share a common layout scheme. In such structures, transitions and connections between these structures may prove difficult and are often a source of performance issues.
In multi-layer substrates such as a Ball Grid Array (BGA) package, via structures as well as transitions from a C4 or wirebond pitch (˜225 um) to a BGA or other pin pitch (˜1000 um) become the bottlenecks of electrical performance. These bottlenecks are compounded with ever increasing operating speed. A via size/spacing that is selected for matching a system characteristic impedance at the C4 or wirebond end of a package tends to result in much higher impedance at the BGA end. This impedance variation is detrimental particularly when via length is larger than 1/10 of a propagation wavelength, noting that the wavelength decreases with the increase in operating frequency.
For example, in a 2 mm thick alumina substrate, the critical frequency is about 5 GHz, and this critical frequency decreases with the increase of substrate thickness. Issues arise with 6 Gb/sec server and network switching links are emerging in the near future, and with many communication and testing applications targeting 40 Gb/sec and above.